A 1 1/4 inch 8.3M pixel digital output CMOS APS for UDTV application

@article{Takayanagi2003A11,
  title={A 1 1/4 inch 8.3M pixel digital output CMOS APS for UDTV application},
  author={Isao Takayanagi and M. Shirakawa and K. Mitani and M. Sugawara and Steinar Iversen and J. Moholt and Junichi Nakamura and Eric R. Fossum},
  journal={2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.},
  year={2003},
  pages={216-217 vol.1}
}
  • I. Takayanagi, M. Shirakawa, +5 authors E. Fossum
  • Published 2003
  • Computer Science, Engineering
  • 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.
A 3936/spl times/2196 pixel CMOS APS has a 10 b column-based ADC. It operates at 49.5 MHz in a progressive scanning mode at 60 frames/s and achieves a 2000 TV line resolution, sensitivity of 4200 b/lux-s, and power consumption of less than 760 mW. 
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