A 0.47–1.6mW 5bit 0.5–1GS/s time-interleaved SAR ADC for low-power UWB radios

@article{Harpe2011A05,
  title={A 0.47–1.6mW 5bit 0.5–1GS/s time-interleaved SAR ADC for low-power UWB radios},
  author={Pieter Harpe and Ben Busze and Kathleen Philips and Harmke de Groot},
  journal={2011 Proceedings of the ESSCIRC (ESSCIRC)},
  year={2011},
  pages={147-150}
}
This paper presents a 16-channel time-interleaved 5-bit asynchronous SAR ADC for UWB radios. It proposes 400aF unit capacitors, offset calibration, a self-resetting comparator and a distributed clock divider to optimize the performance. The prototype in 90nm CMOS occupies only 0.11mm2 including decoupling capacitors. Two relevant modes for UWB are supported: 0.5GS/s at 0.75V supply, and 1GS/s at 1V supply with 0.47mW and 1.6mW power consumption respectively. With an ENOB of 4.7 and 4.8bit, this… CONTINUE READING

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