A 0.43pJ/bit true random number generator

@article{Kuan2014A0T,
  title={A 0.43pJ/bit true random number generator},
  author={Ting-Kuei Kuan and Yu-Hsuan Chiang and Shen-Iuan Liu},
  journal={2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)},
  year={2014},
  pages={33-36}
}
A small-area energy-efficient true random number generator (TRNG) is presented. This TRNG introduces a jitter signal generator to realize the noise pre-amplification, and utilizes a metastable latch to resolve the jitter edges. Moreover, to tolerate the process and environment variations, an offset calibration is employed to dynamically correct the bias of the probability of logic 0/1 in background. A prototype is fabricated in 40-nm CMOS technology. It occupies an area of 0.0014mm2 and… CONTINUE READING
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