A 0.3V 3.6GHz 0.3mW frequency divider with differential ED-CMOS/SOI circuit technology

@article{Douseki2003A03,
  title={A 0.3V 3.6GHz 0.3mW frequency divider with differential ED-CMOS/SOI circuit technology},
  author={Takakuni Douseki and Toshishige Shimamura and Nobutaro Shibata},
  journal={2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.},
  year={2003},
  pages={114-482 vol.1}
}
A differential ED-CMOS/SOI circuit combines both zero V/sub T/ CMOS/SOI and ED-MOS/SOI circuits and operates at supply voltages as low as 0.3V. An experimental frequency divider, fabricated in a 0.25/spl mu/m fully-depleted SOI process, achieves a maximum operating frequency of 3.6GHz at 0.3V and 5.4GHz at 0.5V while reducing power dissipation to less than 1 mW. 

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