A 0.63ps, 12b, synchronous cyclic TDC using a time adder for on-chip jitter measurement of a SoC in 28nm CMOS technology

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@inproceedings{Kim2014A01, title={A 0.63ps, 12b, synchronous cyclic TDC using a time adder for on-chip jitter measurement of a SoC in 28nm CMOS technology}, author={Sung-Jin Kim and Taeik Kim and Hojin Park}, booktitle={VLSIC}, year={2014} }