A 0 . 6V to 1V Audio ΔΣ Modulator in 65 nm CMOS with 90 . 2 dB SNDR at 0 . 6V

@inproceedings{Liu2014A0,
  title={A 0 . 6V to 1V Audio ΔΣ Modulator in 65 nm CMOS with 90 . 2 dB SNDR at 0 . 6V},
  author={Liyuan Liu and Dongmei Li and ZhihuaWang},
  year={2014}
}
This paper presents a discrete time, single loop, third order ΔΣ modulator. The input feed forward technique combined with 5bit quantizer is adopted to suppress swings of integrators. Harmonic distortions as well as the noise mixture due to the nonlinear amplifier gain are prevented.The design of amplifiers is hence relaxed. To reduce the area and power… CONTINUE READING