5.3 Wide-frequency-range resonant clock with on-the-fly mode changing for the POWER8TM microprocessor

@article{Restle201453WR,
  title={5.3 Wide-frequency-range resonant clock with on-the-fly mode changing for the POWER8TM microprocessor},
  author={Phillip Restle and David Shan and David Hogenmiller and Yong Han Kim and Alan J. Drake and Jason Hibbeler and Thomas J. Bucelot and G. Welles Still and Keith A. Jenkins and Joshua Friedrich},
  journal={2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)},
  year={2014},
  pages={100-101}
}
A resonant-clock design for the IBM POWER8 processor core was implemented with 2 resonant modes (and a non-resonant mode), saving clock power over a wide frequency range from 2.5GHz to more than 5GHz. The POWER8 microprocessor is composed of 12 chiplets, each containing a single resonant clock grid for one core and its L2 cache, and a half-frequency, non-resonant clock grid for the L3 cache. The clock grids drive the local clock buffers (LCBs) that in turn drive the latches. The LCBs are gated… CONTINUE READING