4K Real-Time HEVC Decoder on an FPGA

Abstract

With the popularization of a quad high-definition/4K video being dependent on the availability of real-time High Efficiency Video Coding (HEVC) decoders, hardware implementations have become more appealing due to their superior performance and low power consumption. In this paper, a field-programmable gate array (FPGA)-based hardware implementation of a 4K… (More)
DOI: 10.1109/TCSVT.2015.2469113

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Cite this paper

@article{Abeydeera20164KRH, title={4K Real-Time HEVC Decoder on an FPGA}, author={Maleen Abeydeera and Manupa Karunaratne and Geethan Karunaratne and Kalana De Silva and Ajith Pasqual}, journal={IEEE Transactions on Circuits and Systems for Video Technology}, year={2016}, volume={26}, pages={236-249} }