3D-transistor array based on horizontally suspended silicon nano-bridges grown via a bottom-up technique.

@article{Oh20143DtransistorAB,
  title={3D-transistor array based on horizontally suspended silicon nano-bridges grown via a bottom-up technique.},
  author={Jin Yong Oh and Jong-Tae Park and Hyun-June Jang and Won-Ju Cho and M. Saif Islam},
  journal={Advanced materials},
  year={2014},
  volume={26 12},
  pages={1929-34}
}
Integrated surround-gate field-effect-transistors enabled by bottom-up synthesis of nano-bridges are demonstrated. Horizontally oriented silicon nano-bridge devices are fabricated avoiding the rigorous processes for aligning and contacting nanowires grown via a bottom-up technique. Evaluation of electrical properties and a memory device application of the… CONTINUE READING