3D-NonFAR: Three-dimensional non-volatile FPGA architecture using phase change memory

@article{Chen20103DNonFARTN,
  title={3D-NonFAR: Three-dimensional non-volatile FPGA architecture using phase change memory},
  author={Yibo Chen and Jishen Zhao and Yuan Xie},
  journal={2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED)},
  year={2010},
  pages={55-60}
}
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero boot-up delay, real-time reconfigurability, and superior energy efficiency. This paper presents a novel three-dimensional (3D) non-volatile FPGA architecture (3D-Non-FAR) using phase change memory (PCM) and 3D die stacking techniques. Basic structures in a conventional FPGA architecture are renovated with PCM, and… CONTINUE READING
Highly Cited
This paper has 39 citations. REVIEW CITATIONS

Citations

Publications citing this paper.
Showing 1-10 of 30 extracted citations

Power-aware and cost-efficient state encoding in non-volatile memory based FPGAs

2017 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) • 2017
View 4 Excerpts
Highly Influenced

mrFPGA: A novel FPGA architecture with memristor-based reconfiguration

2011 IEEE/ACM International Symposium on Nanoscale Architectures • 2011
View 4 Excerpts
Highly Influenced

A Resistive RAM-Based FPGA Architecture Equipped With Efficient Programming Circuitry

IEEE Transactions on Circuits and Systems I: Regular Papers • 2018
View 1 Excerpt

Low Overhead Online Checkpoint for Intermittently Powered Non-volatile FPGAs

2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) • 2018
View 1 Excerpt

NVM-Based FPGA Block RAM With Adaptive SLC-MLC Conversion

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems • 2018
View 3 Excerpts

Age-aware logic and memory co-placement for RRAM-FPGAs

2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC) • 2017
View 1 Excerpt

CP-FPGA: Energy-Efficient Nonvolatile FPGA With Offline/Online Checkpointing Optimization

IEEE Transactions on Very Large Scale Integration (VLSI) Systems • 2017
View 1 Excerpt

Design Exploration for Multiple Level Cell Based Non-Volatile FPGAs

2017 IEEE International Conference on Computer Design (ICCD) • 2017
View 1 Excerpt

References

Publications referenced by this paper.
Showing 1-5 of 5 references

Performance Benefits of Monolithically Stacked 3-D FPGA

IEEE Trans. on CAD of Integrated Circuits and Systems • 2007
View 5 Excerpts
Highly Influenced

Similar Papers

Loading similar papers…