3-D Mesh-Based Optical Network-on-Chip for Multiprocessor System-on-Chip

@article{Ye20133DMO,
  title={3-D Mesh-Based Optical Network-on-Chip for Multiprocessor System-on-Chip},
  author={Yaoyao Ye and Jiang Xu and Baihan Huang and Xiaowen Wu and Wenjun Zhang and Xuan Wang and Mahdi Nikdast and Zhehui Wang and Weichen Liu and Zhenchang Wang},
  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year={2013},
  volume={32},
  pages={584-596}
}
Optical networks-on-chip (ONoCs) are emerging communication architectures that can potentially offer ultrahigh communication bandwidth and low latency to multiprocessor systems-on-chip (MPSoCs). In addition to ONoC architectures, 3-D integrated technologies offer an opportunity to continue performance improvements with higher integration densities. In this paper, we present a 3-D mesh-based ONoC for MPSoCs, and new low-cost nonblocking 4 × 4, 5 × 5, 6 × 6, and 7 × 7 optical routers for… CONTINUE READING

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References

Publications referenced by this paper.
SHOWING 1-10 OF 42 REFERENCES

A Four-Channel, 10 Gbps Monolithic Optical Receiver In 130nm CMOS With Integrated Ge Waveguide Photodetectors

  • OFC/NFOEC 2007 - 2007 Conference on Optical Fiber Communication and the National Fiber Optic Engineers Conference
  • 2007
VIEW 4 EXCERPTS
HIGHLY INFLUENTIAL

System-Level Modeling and Analysis of Thermal Effects in Optical Networks-on-Chip

  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • 2013
VIEW 6 EXCERPTS
HIGHLY INFLUENTIAL

3D optical networks-on-chip (NoC) for multiprocessor systems-on-chip (MPSoC)

  • 2009 IEEE International Conference on 3D System Integration
  • 2009
VIEW 5 EXCERPTS
HIGHLY INFLUENTIAL

A NoC Traffic Suite Based on Real Applications

  • 2011 IEEE Computer Society Annual Symposium on VLSI
  • 2011
VIEW 1 EXCERPT

850 nm VCSELs for up to 40 Gbit/s short reach data links

  • CLEO/QELS: 2010 Laser Science to Photonic Applications
  • 2010
VIEW 1 EXCERPT

A Hierarchical Hybrid Optical-Electronic Network-on-Chip

  • 2010 IEEE Computer Society Annual Symposium on VLSI
  • 2010
VIEW 1 EXCERPT

A low-power low-cost optical router for optical networks-on-chip in multiprocessor systemson-chip

H. Gu, K. H. Mo, J. Xu, W. Zhang
  • Proc. IEEE Comput. Soc. Annu. Symp. VLSI, May 2009, pp. 19–24.
  • 2009
VIEW 2 EXCERPTS