3-D Interconnects Using Cu Wafer Bonding : Technology and Applications
@inproceedings{Reif20043DIU, title={3-D Interconnects Using Cu Wafer Bonding : Technology and Applications}, author={Rafael Reif and Chuan Seng Tan and Andy Fan and Kuan-Neng Chen and Shamik Das and Nisha Checka}, year={2004} }
3-D interconnects hold tremendous potential to reduce global interconnect latency and power dissipation. Moreover, it allows heterogeneous integration, i.e., monolithic integration of different technologies (e.g., logic, memory, and RF). This paper explores the opportunities and challenges of the 3-D integration approach by low temperature direct Cu-to-Cu wafer bonding. A thorough description of process integration will be given and key technological challenges will be highlighted. In…
12 Citations
3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections
- Engineering, Materials ScienceIBM J. Res. Dev.
- 2008
Results are reported for 3D integration after using a chip-to-wafer assembly process using 3D chip-stacking technology and fine-pitch interconnects with lead-free solder.
TSV-Based 3-D ICs: Design Methods and Tools
- Computer ScienceIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- 2017
The objective of this paper is to provide a unified perspective on the fundamental opportunities and challenges posed by 3-D ICs especially from the context of design tools and methods and conclude with a discussion of the remaining challenges and open problems that must be overcome to make 3- D IC technology commercially viable.
Ultrafine Pitch (6 $\mu\hbox{m}$) of Recessed and Bonded Cu–Cu Interconnects by Three-Dimensional Wafer Stacking
- Materials ScienceIEEE Electron Device Letters
- 2012
In this letter, an evolution of high-density (>; 106 cm-2) bonded Cu-Cu interconnects of 6-μm pitch is successfully demonstrated using wafer-on-wafer thermocompression bonding. Cu sealing frame with…
Chapter 2 TSV-Based 3 D Integration
- Engineering
- 2017
Theoretical studies in the 1980s [1, 2] suggested that significant reductions in signal delay and power consumption could be achieved with 3D integrated circuits (3D ICs). A 3D IC is a chip that…
TSV-Based 3D Integration
- Engineering
- 2011
Theoretical studies in the 1980s [1, 2] suggested that significant reductions in signal delay and power consumption could be achieved with 3D integrated circuits (3D ICs). A 3D IC is a chip that…
Mitigating heat dissipation and thermo-mechanical stress challenges in 3-D IC using thermal through silicon via (TTSV)
- Engineering2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)
- 2010
Thermal modeling of a 3-D IC stack consists of three IC layers bonded back-to-face (or face up) is performed. Significant temperature rise in the top layers is projected with the presence of…
Thermal mitigation using thermal through silicon via (TTSV) in 3-D ICs
- Engineering2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference
- 2009
Thermal simulation of a stack consists of three IC layers bonded “face up” is performed using finite element modeling. Significant reduction of ~62 °C in maximum chip temperature is predicted by…
Filler trap and solder extrusion in 3D IC thermo-compression bonded microbumps
- Materials Science2014 IEEE 64th Electronic Components and Technology Conference (ECTC)
- 2014
As the Moore's law is drawing to an end, there is a growing consensus that 3D stacking of Si integrated circuit chips is necessary to continue the current technological trend. In our work, a test 3D…
References
SHOWING 1-10 OF 11 REFERENCES
Journal of materials science: materials in medicine.
- Medicine, Materials ScienceJournal of materials science. Materials in medicine
- 2003
The journal examines the metals, ceramics, polymers and composites used in orthopaedic, maxillo-facial, cardiovascular, neurological, ophthalmic and dental applications.
International Technology Roadmap for Semiconductors 2003の要求清浄度について - シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について -
- Engineering
- 2004
Journal of Electronics Materials
- Journal of Electronics Materials
- 2001
Proceeding of the IEEE
- Proceeding of the IEEE
- 2001
Proceeding of the IEEE International Interconnect Technology Conference
- Proceeding of the IEEE International Interconnect Technology Conference
- 2001
Proceeding of the International Symposium on Quality Electronics Design
- Proceeding of the International Symposium on Quality Electronics Design
- 2001
Proceedings of the IEEE Interconnect Technology Conference
- Proceedings of the IEEE Interconnect Technology Conference
- 2001
Electrochemical and Soild-State Letters
- Electrochemical and Soild-State Letters
- 1999
Microelectronics Engineering
- Microelectronics Engineering
- 1997