3-D Interconnects Using Cu Wafer Bonding : Technology and Applications
@inproceedings{Reif20043DIU,
title={3-D Interconnects Using Cu Wafer Bonding : Technology and Applications},
author={Rafael Reif and Chuan Seng Tan and Andy Fan and Kuan-Neng Chen and Shamik Das and Nisha Checka},
year={2004}
}3-D interconnects hold tremendous potential to reduce global interconnect latency and power dissipation. Moreover, it allows heterogeneous integration, i.e., monolithic integration of different technologies (e.g., logic, memory, and RF). This paper explores the opportunities and challenges of the 3-D integration approach by low temperature direct Cu-to-Cu wafer bonding. A thorough description of process integration will be given and key technological challenges will be highlighted. In…
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