200GHz CMOS prescalers with extended dividing range via time-interleaved dual injection locking

@article{Gu2010200GHzCP,
  title={200GHz CMOS prescalers with extended dividing range via time-interleaved dual injection locking},
  author={Qun Jane Gu and Heng-Yu Jian and Zhiwei Xu and Yi-Cheng Wu and Mau-Chung Frank Chang and Yves Baeyens and Young-Kai Chen},
  journal={2010 IEEE Radio Frequency Integrated Circuits Symposium},
  year={2010},
  pages={69-72}
}
An unique time-interleaved dual injection locking scheme has been devised to enable ultra high-speed and low-power frequency division with extended frequency locking range. To prove the concept, two frequency dividers (or prescalers) have been realized in 65nm digital CMOS: one divides continuously from 158GHz to 195GHz (or 21% locking range) with input signal ≪ 0dBm and the other divides from 181GHz to 208GHz (or 14% locking range) with input signal ≪ −1dBm. Both prescalers consume ≪ 2.5mW at… CONTINUE READING

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