10.6 A 6.75-to-8.25GHz, 250fsrms-integrated-jitter 3.25mW rapid on/off PVT-insensitive fractional-N injection-locked clock multiplier in 65nm CMOS

@article{Elkholy2016106A6,
  title={10.6 A 6.75-to-8.25GHz, 250fsrms-integrated-jitter 3.25mW rapid on/off PVT-insensitive fractional-N injection-locked clock multiplier in 65nm CMOS},
  author={Ahmed Elkholy and Ahmed Elmallah and Mohamed Elzeftawi and Ken Chang and Pavan Kumar Hanumolu},
  journal={2016 IEEE International Solid-State Circuits Conference (ISSCC)},
  year={2016},
  pages={192-193}
}
Injection-locked clock multipliers (ILCMs) achieve superior phase noise compared to conventional PLLs [1, 2]. In its simplest form, an ILCM is an oscillator into which a train of narrow pulses is injected at reference frequency FREF as shown in Fig. 10.6.1. If the free-running frequency, FFR, of the oscillator is tuned close to NFREF (N=4, in Fig. 10.6.1), injected pulses phase lock the oscillator and greatly suppress its close-in phase noise. However, any deviation of FFR from NFREF degrades… CONTINUE READING

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A 7Gb/s rapid on/off embedded-clock serial-link transceiver with 20ns power-on time, 740μW off-state power for energy-proportional links in 65nm CMOS,

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