1.2-V folded down-conversion wideband mixer in 65-nm CMOS

Abstract

This paper presents the design of a low-voltage folded down-conversion mixer for direct conversion receiver. The RF-transconductance stage of the mixer is based on an AC-coupled stacked NMOS-PMOS current reuse topology. The mixer has a peak conversion gain (CG) of 8 dB with a 3-dB bandwidth from 10.25 GHz to approximately 17.8 GHz (IF ranges from DC to 6.5… (More)

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Cite this paper

@article{Muhammad201212VFD, title={1.2-V folded down-conversion wideband mixer in 65-nm CMOS}, author={N. A. Muhammad and Zhi Gong Wang and B. B. Kuan and Zhiqun Li}, journal={2012 IEEE International Conference on Electron Devices and Solid State Circuit (EDSSC)}, year={2012}, pages={1-4} }