0.4-V logic-library-friendly SRAM array using rectangular-diffusion cell and delta-boosted-array voltage scheme

@article{Yamaoka200404VLS,
  title={0.4-V logic-library-friendly SRAM array using rectangular-diffusion cell and delta-boosted-array voltage scheme},
  author={M. Yamaoka and Kenichi Osada and Koichiro Ishibashi},
  journal={IEEE Journal of Solid-State Circuits},
  year={2004},
  volume={39},
  pages={934-940}
}
We designed a logic-library-friendly SRAM array. The array uses rectangular-diffusion cell (RD cell) and delta-boosted-array-voltage scheme (DBA scheme). In the RD cell, the cell ratio is 1.0, and it reduces the imbalance of the cell ratio. A low supply voltage deteriorates the static noise margin, however, the DBA scheme compensates it. Using the combination of RD cell and DBA scheme, a 32-kB test chip achieves 0.4-V operation at 4.5-MHz frequency, 140-/spl mu/W power dissipation, and 0.9-/spl… CONTINUE READING
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