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1 Abstract— A test chip with various test structures has been designed and fabricated in a 0.25 μm Silicon-On-Sapphire CMOS technology and irradiated with a Co-60 gamma source and a 230 MeV proton beam. The sapphire substrate is left either floating or tied to ground when the transistors are irradiated with the Co-60 gamma irradiation up to 100 krad(Si… (More)


5 Figures and Tables