Zoltan Francisc Baruch

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– Field-Programmable Gate Arrays (FPGAs) are flexible circuits that can be (re)configured by the designer. The efficient use of these circuits requires complex CAD tools. One of the steps of the design process for FPGAs is represented by placement. In this paper we present a genetic algorithm for the FPGA placement problem, in particular for the Atmel FPGA(More)
In this paper we present a specific routing algorithm for the Atmel 6002 FPGA circuit. We define a specific cost function and a specific way of handling the connectivity list, sorting it by two main criteria: the number of stored links and the competition's cost. We implemented a routing algorithm which simultaneously treats the global and local routing.(More)
We propose an Expert System Shell based on belief revision concepts who maintains the consistency of the knowledge base. In the first phase of this expert system shell we translate a classical rule-based system in an equivalent network representation where nodes are facts, and links stand for relationships. In the second phase we propagate any change in the(More)
The datapath allocation is one of the basic operations executed in the process of high-level synthesis. The other operations are partitioning and scheduling. The datapath allocation problem consists of two important tasks: unit selection and unit assignment. Unit selection determines the number and types of RT components to be used in the design. Unit(More)
In this paper we present a CAD system for logic design using the Atmel 6000 series FPGA circuits. The design input is a textual description in the ABEL hardware description language. This description is compiled into a set of equations. From this set of equations, an internal representation of the digital circuit is generated. Then, the CAD system performs(More)
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