Zizhen Jiang

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We demonstrate a dynamic Verilog-A RRAM compact model capable of simulating real-time DC cycling and pulsed operation device behavior, including random variability that is inherent to RRAM. This paper illustrates the physics and capabilities of the model. The model is verified using different sets of experimental data. The DC/Pulse parameter fitting(More)
The emerging paradigm of 'abundant-data' computing requires real-time analytics on enormous quantities of data collected by a mushrooming network of sensors. Todays computing technology, however, cannot scale to satisfy such big data applications with the required throughput and energy efficiency. The next technology frontier will be monolithically(More)
—Reflection removal is widely needed with the prevalence of camera equipped mobile phones while no available algorithm is ready for this application. In this paper we propose our reflection removal algorithm which is specifically designed for smart phones. Our algorithm requires the phone app to take two pictures of the same target, one with the flash light(More)
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