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Field Programmable Gate Array (FPGA) is an effective device to realize real-time parallel processing of vast amounts of video data because of the fine-grain reconfigurable structures. This paper presents a kind of parallel processing construction of Sobel edge detection enhancement algorithm, which can quickly get the result of one pixel in only one clock(More)
We propose an efficient hardware architecture for Kanade-Lucas-Tomasi(KLT) algorithm to process over-sampling video data in real-time. The philosophy of this paper is to make sure the tracking performance of KLT by decreasing the inter-frame displacement rather than handling large displacement by complex algorithms. It would be a preferable method for(More)
High-quality optical flow computation algorithms are computationally intensive. The low computational speed of such algorithms causes difficulties for real-world applications. In this article, we propose an optimized implementation of the classical Combine-Brightness-Gradient (CBG) model on the Xilinx ZYNQ FPGA-SoC, by taking advantage of the inherent(More)
Currently, Java has been gradually applied in embedded real-time area with the improvement by the Real-Time Specification for Java (RTSJ). Accordingly, a hardware Java execution engine for embedded real-time applications, JPOR-32 (32-bit Java Processor Optimized for RTSJ), is designed. Taking JPOR-32 for an example, this paper presents the garbage(More)
Asynchronous Transfer of Control (ATC) is a crucial mechanism for real-time applications, and is currently provided in the Real-Time Specification for Java (RTSJ). This paper proposes a framework to implement ATC in the RTSJ-compliant Java processor based on the instruction optimization method proposed in our previous work [1]. Because most of the(More)