ZhenYu Wu

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BiWei Liu1
PengCheng Huang1
ZhengFa Liang1
1BiWei Liu
1PengCheng Huang
1ZhengFa Liang
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The advancement in the process leads to more concern about the Single Event (SE) sensitivity of the Differential Cascade Voltage Switch Logic (DCVSL) circuits. The simulation results indicate that the Single Event Transient (SET) generated at the DCVSL gate is much larger than that at the ordinary CMOS gate, and their SET variation is different. Based on(More)
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