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A 5 GHz automatically bias controlled power amplifier is manufactured in a 0.18 /spl mu/m CMOS process and occupies 0.54 mm/sup 2/. The measured power gain, P/sub 1dB/, and PAE are 7.1 dB, 19.2 dBm, and 17.5%, respectively. For fair comparison, the same PA without the bias circuit is also implemented. The fully integrated bias control circuit improves the(More)
A 20-Gb/s current-mode optical receiver is realized in a 0.13-μm CMOS process, which consists of a common-gate transimpedance amplifier (TIA) with on-chip transformers, a six-stage postamplifier (PA) with an offset cancellation network, and an output buffer. The transformer-based inductive peaking technique is exploited in the TIA to isolate the parasitic(More)
A fully integrated 2.4 GHz CMOS transceiver IC for the low power wireless personal area network (WPAN) is reported. This is based on a dual-conversion architecture receiver and transmitter which are suitable for silicon integration. The frequency synthesizer offering 1.92 GHz and 480 MHz quadrature LO signals are also integrated on the radio chip. In the(More)
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