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A stacked 2.4-GHz CMOS power amplifier (PA) with a mode switching scheme is proposed to enhance the back-off efficiency for wireless local area network applications. By means of dynamically tuning the bias and optimal load with a power-detecting controller, the proposed mode switching scheme effectively improves the power-added efficiency (PAE) of the PA by(More)
A 2.4GHz stacked CMOS power amplifier (PA) with mode switching scheme is proposed to improve back-off efficiency in WLAN applications. The mode switching scheme effectively improves the PAE by 100% at 5dB back-off power by dynamically tuning the PA bias and optimal load with a power detecting controller. With the transistor-stacking and self-biasing(More)
—A 0.1–5.0 GHz 65 nm CMOS recongurable transmitter for private network wireless communications is presented. The transmitter integrates a 0.1–1.5 GHz high-efciency dual-mode power amplier to support low-cost narrowband applications and a 0.45–5.0 GHz efciency-optimized pre-power amplier to support high-performance wideband applications. A wideband PLL(More)
A fully-integrated Sub-GHz low-power transceiver (TRX) for 802.11ah applications is presented. The receiver takes both advantages of Low-IF/Zero-IF architectures while supporting 1/2/8MHz reconfigurable signal bandwidth. A Σ-Δ fractional-N PLL with Class-C VCO is employed to provide the LOs. In order to enhance the power amplifier (PA)(More)