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ÐRecursive Diagonal Torus (RDT), a class of interconnection network is proposed for massively parallel computers with up to 2 nodes. By making the best use of a recursively structured diagonal mesh (torus) connection, the RDT has a smaller diameter (e.g., it is 11 for 2 nodes) with a smaller number of links per node (i.e., 8 links per node) than those of(More)
In this paper, we present a novel network topology to build an on chip interconnection network. This so called PRDT(2, 1) structure offers a few distinct architectural features, including (i) high scalability, (ii) small diameter and average distance, (iii) reconfigurability with its embedded mesh/torus topology, and (iv) high degree of fault tolerance.(More)
The convex quadratic programming problem, involved in the large scale support vector machine (SVM) training phase, is computationally expensive. Interior Point Methods (IPM) have been used successfully to solve this problem. They have polynomial time complexity and maintain a constant predictable structure of the linear system that needs to solve each(More)
The functional role of autocrine trefoil factor-1 (TFF1) in mammary carcinoma has not been previously elucidated. Herein, we demonstrate that forced expression of TFF1 in mammary carcinoma cells resulted in increased total cell number as a consequence of increased cell proliferation and survival. Forced expression of TFF1 enhanced anchorage-independent(More)
The interconnection network plays an important role in the performance and energy consumption of a network-on-chip (NoC) system. In this paper, we propose a RDT(2,2,1)//spl alpha/-based interconnection network for NoC designs. RDT(2,2,1)//spl alpha/ is constructed by recursively overlaying 2D diagonal meshes (torus). The number of layers needed for routing(More)
It has been well recognized that the fault-tolerance capability is vital for a NoC system, since one faulty link/processor may isolate a large fraction of processors. Continuing from a previous paper [13] where a RDT(2,2,1)/α-based interconnection network for NoC designs was proposed, in this paper, we investigate fault-tolerant routing schemes on NoC(More)
JUMP-1 is currently under development by seven Japanese universities to establish techniques of an e cient distributed shared memory on a massively parallel processor. It provides a memory coherency control scheme called the hierarchical bit-map directory to achieve cost e ective and high performance management of the cache memory. Messages for maintaining(More)
The connection topology of interconnection networks and the routing algorithm often dominate system performance in MPCs. RDT has already been proved to be one of the best interconnection networks used in such systems. It supports a smaller diameter and degree than most at the size of one thousand to tens of thousands nodes. The floating vector routing(More)