Yulu Yang

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ÐRecursive Diagonal Torus (RDT), a class of interconnection network is proposed for massively parallel computers with up to P IT nodes. By making the best use of a recursively structured diagonal mesh (torus) connection, the RDT has a smaller diameter (e.g., it is 11 for P IT nodes) with a smaller number of links per node (i.e., 8 links per node) than those(More)
The interconnection network plays an important role in the performance and energy consumption of a Network-on-Chip (NoC) system. In this paper, we propose a RDT(2,2,1)/α-based interconnection network for NoC designs. RDT(2,2,1)/α is constructed by recursively overlaying 2-D diagonal meshes (torus). The number of layers needed for routing the links in(More)
It has been well recognized that the fault-tolerance capability is vital for a NoC system, since one faulty link/processor may isolate a large fraction of processors. Continuing from a previous paper [13] where a RDT(2,2,1)/α-based interconnection network for NoC designs was proposed, in this paper, we investigate fault-tolerant routing schemes on NoC(More)
JUMP-1 is currently under development by seven Japanese universities to establish techniques of an ecient distributed shared memory on a massively parallel processor. It provides a memory coherency control scheme called the hierarchical bit-map directory to achieve cost eective and high performance management of the cache memory. Messages for maintaining(More)
In networks-on-chip (NoC) designs, delay variations and crosstalk noise have become a serious issue with the continuously shrinking geometry of semiconductor devices and the increasing switching speed. The crosstalk between adjacent lines causes data dependent signal delay and noise, thus finally makes the communication channel unreliable. The crosstalk(More)