Acknowledgments Technical support by the ICAN, AIST 1 Outline Background of this study-Why "higher-k" gate stack-Our strategy Purpose Experimental procedure Results and discussion Summary 2 1.
A threshold voltage (V th) controllable multigate FinFET on a 10-nm-thick ultrathin BOX (UTB) SOI substrate have been investigated. It is revealed that the V th of the FinFET on the UTB SOI substrate is effectively modulated thanks to the improved coupling between the Si channel and the back gate. We have also carried out analysis of the V th… (More)
The scaled charge trapping (CT) type silicon on insulator (SOI) FinFET flash memories with different blocking layer materials of Al 2 O 3 and SiO 2 have successfully been fabricated, and their electrical characteristics including short-channel effect (SCE) immunity, threshold voltage (V t) variability, and the memory characteristics have been comparatively… (More)