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—The 1-bit full adder circuit is a very important component in the design of application specific integrated circuits. This paper presents a novel low-power multiplexer-based 1-bit full adder that uses 12 transistors (MBA-12T). In addition to reduced transition activity and charge recycling capability, this circuit has no direct connections to the(More)
— Due to the bufferless nature of OBS networks, random burst losses may occur, even at low traffic loads. For optical burst-switched (OBS) networks in which TCP is implemented at a higher layer, these random burst losses may be mistakenly interpreted by the TCP layer as congestion in the network, leading to serious degradation of the TCP performance. In(More)
— In this paper, we evaluate the performance of a burst retransmission scheme in which the bursts lost due to contentions in an OBS network are retransmitted at the OBS layer. The retransmission scheme aims to reduce burst loss probability in OBS networks. We develop an analytical model for obtaining the burst loss probability over an OBS network that uses(More)
The Diffie-Hellman problem is often the basis for establishing conference keys. In heterogeneous networks, many conferences have participants of varying resources, yet most conference keying schemes do not address this concern and place the same burden upon less powerful clients as more powerful ones. The establishment of conference keys should minimize the(More)
AIM To investigate the potential of reducing the radiation dose in prospectively electrocardiogram-triggered coronary computed tomography angiography (CCTA) while maintaining diagnostic image quality using an iterative reconstruction technique (IRT). METHODS AND MATERIALS Prospectively-gated CCTA were first performed on a phantom using 256-slice(More)
—The explosive growth of 802.11-based wireless LANs has attracted interest in providing higher data rates and greater system capacities. Among the IEEE 802.11 standards, the 802.11a standard based on OFDM modulation scheme has been defined to address high-speed and large-system-capacity challenges. Hardware implementations are often used to meet the(More)