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Dynamic supply voltage scaling (DVS) is one of the best ways to reduce the energy consumption of a device when there is a super-linear relationship between energy and supply voltage, and a pseudo-linear relationship between delay and supply voltage. However, most DVS schemes scale the clock frequency of the supply-voltage-clock-scalable (SVCS) CPU only and(More)
We discover significant value-dependent programming energy variations in multi-level cell (MLC) flash memories, and introduce an energy-aware data compression method that minimizes the flash programming energy rather than the size of the compressed data. We express energy-aware data compression as an entropy coding with unequal bit-pattern costs. Deploying(More)
Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops. This results in unwanted glitch propagation along the LUTs, and wastes power. This paper proposes a flip-flop insertion, we propose insertion of new flip-flops between adjacent(More)
The MPEG-21 Multimedia Framework initiative aims to support a wide range of networks and devices in the delivery and consumption of multimedia resources. One of the primary goals of MPEG-21 is universal multimedia access (UMA) through Digital Item Adaptation (DIA), which supports multimedia streaming to heterogeneous terminal devices ensuring the same(More)
ALONG WITH SPEED AND COST, energy consumption is now a primary performance metric for battery-operated embedded systems. A well-designed embedded system should be globally optimized to the target application , from the user interface to the device technology. This type of global optimization over many layers of software and hardware is challenging because(More)
Most existing dynamic voltage scaling (DVS) schemes for multiple tasks assume an energy cost function (energy consumption versus execution time) that is independent of the task characteristics. In practice the actual energy cost functions vary significantly from task to task. Different tasks running on the same hardware platform can exhibit different memory(More)
Application launch times, which are important to users, are primarily bounded by disk seek times. A solid-state disk has a negligible seek time, but large solid-state disks are not cost-effective. A hybrid disk, consisting of a large disk drive and a flash memory of smaller capacity, can provide a reasonable compromise. However, there is no systematic(More)
In this paper we propose an on-chip bus PMU which makes accurate estimates of system power consumption from a first-order linear power model by utilizing system-level activity information exchanged on the on-chip bus. It can easily be customized for different on-chip and off-chip memory devices, and is not dependent on a specific CPU core. We model memory(More)
Recent wireless sensor nodes, equipped with ultra-low-power (ULP) RISC microcontrollers, do not generally support DVS (dynamic voltage scaling), though the ULP microcontrollers have ideal energy-voltage-frequency characteristics for DVS. In general, an output-adjustable DC-DC converter is hardly all affordable in such sensor nodes, and surprisingly light(More)