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This paper presents a sigma-delta modulation ADC(analog-to-digital converter) and DAC(digital-to-analog converter) for CODEC applications using 0.18 um CMOS process. In the ADC parts, two sigma-delta modulators with 84 dB SNR are designed for the stereo applications, and their outputs are merged at the digital domain before decimation filter. Digital(More)
—This brief presents a wide-locking-range injection-locked frequency divider (ILFD) that uses an automatic frequency calibration loop. The proposed ILFD uses the ring oscillator to provide the high division ratio with small chip area. A dual-injection scheme is proposed in order to achieve the wide locking range of the ILFD. The free-running frequency of(More)
In this paper, class-E power amplifier (PA) with automatic power control loop and load compensation circuit is presented. The transmitted power is controlled by adjusting the signal applied to the gate of the power control transistor. In addition, a parallel capacitor is also controlled to enhance the efficiency and compensate for the load variation. This(More)