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A novel SigmaDelta fractional-N PLL architecture for fast locking and fractional spur suppressing is proposed based on the capacitance scaling scheme. Fractional spurs suppressing have been achieved by reducing the magnitude of charge pump current when the PLL is in-lock without degrading fast locking characteristic. The effective capacitance of loop filter(More)
This paper proposes a negative feedback looped voltage-controlled ring oscillator (VCRO) with a frequency voltage converter (FVC) to suppress the phase noise. Measurement results of the negative feedback looped VCRO fabricated in a one-poly six-metal 1.8-V 0.18- μm CMOS process show that the phase noises are -90, -90, -94, -102, and -110 dBc/Hz at(More)
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