Yoshinori Yamaguchi

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<italic>A highly parallel (more than a thousand) dataflow machine</italic> EM-4 <italic>is now under development. The</italic> EM-4 <italic>design principle is to construct a high performance computer using a compact architecture by overcoming several defects of dataflow machines. Constructing the</italic> EM-4, <italic>it is essential to fabricate a(More)
Packrat parsing is a powerful parsing algorithm presented by Ford in 2002. Packrat parsers can handle complicated grammars and recursive structures in lexical elements more easily than the traditional <i>LL(k)</i> or <i>LR</i>(1) parsing algorithms. However, packrat parsers require <i>O(n)</i> space for memoization, where <i>n</i> is the length of the(More)
In this paper, we present a thread-based programming model for the EM-4 hybrid dataflow machine, where parallelism and synchronization among threads of sequential execution are described explicitly by the programmer. Although EM-4 was originally designed as a dataflow machine, we demonstrate that it provides effective architectural support for a variety of(More)
Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor communication on an execution pipeline with small and simple packets. It can create a packet in one cycle, and receive a packet from the network in the on-chip buffer without(More)
EMC-Y is a new processing element for highly parallel computers designed to achieve high performance parallel computation by fusing a dataflow mechanism and a von Neumann execution pipeline. We have already developed EMC-R, which is the processing element used in the EM-4 prototype. EMC-Y improves on EMC-R's packet communication performance, allowing it to(More)