Yoshinori Tomita

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In this paper we propose a new breakpoint mechanism, which improves controllability of in-circuit debug. It monitors data packets transmitted on the interface port of the target hardware, and triggers a breakpoint when a specified packet is detected among them in realtime. Regarding a data packet as a series of data sequences, we employ an efficient data(More)
Recently, simulation and/or formal verification in pre-silicon verification cannot accomplish the whole system-level verification with exhaustive input data and run-time because of lack of sufficient speed and logic capacities. Consequently, post-silicon validation, such as in-circuit debugging, becomes increasingly important. In this paper we propose a(More)
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