Yoshihiro Okuno

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In recent year, robust and scale invariant feature extraction algorithms such as SIFT, SURF, and U-SURF are frequently utilized for image recognition. While U-SURF[1] algorithm is robust and scalable to extract interest points and their features, it requires processes in many regions that are scattered in an image. It is difficult for the algorithm to(More)
In this paper, we propose embedded programmable logic matrix (ePLX) which is suitable for flexible System on Chip (SoC). The ePLX architecture is based on the dense two input Look-Up-Table(LUT) array and the hierarchical wiring resources, which are global/local wiring resources and with simple mapping tools. The compile flow of ePLX is also the simple one(More)
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