Yongxun Liu

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Four-terminal (4T) FinFETs with independent double gates and an ideal rectangular cross-section Si-fin channel have successfully been fabricated by using newly developed orientation-dependent wet etching. The flexible threshold voltage (V/sub th/) controllability by one of the double gates arid by synchronized driving mode operation is systematically(More)
We propose a flex-pass-gate SRAM (Flex-PG SRAM), <i>i.e</i>., a FinFET-based SRAM to enhance both the read and write static noise margins (SNMs) independently. The flip-flop in the Flex-PG SRAM consists of usual FinFETs while its pass gates consist of double-"independent"-gate FinFETs, four-terminal-FinFETs. A TCAD simulation revealed that the Flex-PG SRAM(More)
SUMMARY Multi-Gate device technology is the promising candidate for the enhancement of device characteristics of the scaled MOSFETs. Moreover, independent-double-gate devices have been proposed to achieve flexible V th adjustment. It is revealed that the SRAM noise margins have been increased by introducing the independent-double-gate FinFET.
An independent-gate four-terminal FinFET SRAM have been successfully fabricated for drastic leakage current reduction. The new SRAM is consisted of a four-terminal (4T-) FinFET which has a flexible V<sub>th</sub> controllability. The 4T-FinFET with a TiN metal gate is fabricated by a newly developed gate separation etching process. By appropriately(More)
The scaled charge trapping (CT) type silicon on insulator (SOI) FinFET flash memories with different blocking layer materials of Al 2 O 3 and SiO 2 have successfully been fabricated, and their electrical characteristics including short-channel effect (SCE) immunity, threshold voltage (V t) variability, and the memory characteristics have been comparatively(More)
An adaptive-threshold-voltage differential pair and a low-voltage source follower using independent-double-gate-(IDG-) FinFETs are proposed for a low-voltage operational amplifier (op amp). These circuits were implemented by our FinFET technology that enables co-integration of connected-DG- (CDG-) and IDG-FinFETs. The proposed components enable a two-stage(More)