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In this paper there suggested is a bifurcated (or multiple) input-queued ATM switch in which a buffer for each input port is divided into multiple (m) buffer blocks, i.e., bifurcated buffers, for enhancement of the limited throughput of the ordinary input-queued switch using a single FIFO. As the contention/arbitration rule for the bifurcated input-queued(More)
Introduction: In order to overcome the throughput limit of the single input-queued (SIQ) packet switch, a number of bu ering strategies have been put forward in recent years. Among them, the virtual output-queued (VOQ) switch is receiving considerable attention, since it can yield 100% throughput depending on the scheduling algorithm employed. As a special(More)
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