Yongquan Fan

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This paper presents a versatile bit-error-rate (BER) testing scheme to characterize the quality of communication interfaces. Traditionally, the presilicon BER is evaluated using time-consuming software simulations. The stand-alone BER test products for postsilicon evaluation are expensive and do not include channel emulators, which are essential to testing(More)
The quality of a digital communication interface can be characterized by its bit error rate (BER) performance. To ensure the quality of the manufactured interface, it is critical to quickly and precisely test its BER behavior. Traditionally, BER is evaluated using software simulations, which are very time-consuming. Though there are some standalone BER test(More)
Jitter test in production is notorious for its long test time and the challenge of accuracy verification. Among various types of jitter, Random Jitter (RJ) is most challenging to test on Automatic Test Equipment (ATE) because of its randomness. To be considered as a favorable jitter test in production for multi-gigabit devices, the RJ needs to be measured(More)
We witness a phenomenal increase in the use of highspeed serial interfaces (HSSIs). Post-silicon validation and testing of HSSIs are critical to guarantee the design quality and the device quality. Jitter tolerance at 10 Bit Error Rate (BER) is a key parameter that is very costly to qualify due to the long test time. This paper considers an acceleration(More)
The High-Speed Serial Interface (HSSI) is a cornerstone of the modern communications. To achieve high data rates, sophisticated techniques such as equalization and precompensation have now become common in HSSIs. With the concurrent increasing of design complexity and decreasing of the timing budget, the post-silicon validation, debugging and testing of(More)