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This paper presents a network security camera system and its application to provide visual information to consumer electronics devices in ubiquitous environment. For this system, we developed a network camera processor chip and a network security board. The processor includes a digital camera processor, a motion JPEG encoder, an Ethernet controller and an(More)
In this paper, we propose a new instruction set for a network ASIP(Application Specific Instruction-set Processor). The new instruction set was designed for the packet processing engine on a network router. The network ASIP to accelerate the packet processing operation was built on a baseline ASIP, which is based on the general RISC structure. The new(More)
In this paper, we proposed a processor architecture that is suitable for next generation embedded applications, especially for personal information devices such as smart phones, PDAs, and handheld computers. Latest high performance embedded processors are developed to achieve high clock speed. Because increasing performance makes design more difficult and(More)
In this paper we designed a low hardware cost and fast DSP unit for 32-bit embedded EISC (Expanded Instruction Set Computer) microprocessor. The DSP unit operates as a functional unit of a integer core. This architecture can reduce the hardware cost and control easily the pipeline of the processor. The MAC/MAS unit was designed using hybrid radix-4/radix-8(More)
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