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Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory have increased. Unfortunately, memory systems have not kept pace. Even hierarchical cache structures are ineffective if programs do not exhibit cache locality. Because of this(More)
In this paper, a dynamic flow-regulation algorithm-oriented network overload control is proposed. It can proportionally distribute the load between the high-degree nodes and the low-degree nodes. According to the theoretical analysis, the network transmission performance of the proposed algorithm is in inverse proportion to the usage rate of the high-degree(More)
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