Yingmei Chen

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Mobile health applications offer unique opportunities for monitoring patient progress, providing education materials to patients and family members, receiving personalized prompts and support, collecting ecologically valid data, and using self-management interventions when and where they are needed. Mobile health application services to mental illness have(More)
A multiphase LC voltage-controlled oscillator (VCO) with a novel capacitive coupling CL ladder filter structure is proposed in this paper and this 10 GHz eight-phase VCO is applied in clock and data recovery (CDR) circuit for 40 Gb/s optical communications system. Compared with the traditional eight-phase oscillator, this capacitive coupling structure can(More)
A high-scale integrated optical receiver including a preamplifier, a limiting amplifier, a clock and data recovery (CDR) block, and a 1:4 demultiplexer (DEMUX) has been realized in a 0.25 μm CMOS technology. Using the loop parameter optimization method and the low-jitter circuit design technique, the rms and peak-to-peak jitter of the recovered 625 MHz(More)
This paper proposed a 4-channel parallel 40 Gb/s front-end amplifier (FEA) in optical receiver for parallel optical transmission system. A novel enhancement type regulated cascade (ETRGC) configuration with an active inductor is originated in this paper for the transimpedance amplifier to significantly increase the bandwidth. The technique of three-order(More)
A 4-channel Vertical Cavity Surface Emitting Laser (VCSEL) driver array is designed in a 0.18μm CMOS technology. Simulated results show that each channel works at 10Gb/s (12.5Gb/s max) under a supply voltage of 1.8 V. Thus, aggregated total capacity of 40 Gb/s can be obtained from 4 channels. The power dissipation of each channel is only 50mW. To(More)
A 10 Gb/s continuous-time linear adaptive equalizer IC for 10 Gigabit short-reach optical interconnects using GLOBALFOUNDRIES (GF) 0.13 μm SiGe BiCMOS technology is described. The circuit consists of a continuous-time linear equalizer, an adaptation loop using spectrum balancing technique, an on-chip bandgap reference (BGR), and a low-dropout regulator(More)
We realized 10Gb/s limiting amplifier by using SMIC 0.18μm 1P6M mixed-signal CMOS process. Without any inductors, the bandwidth of the amplifier is effectively increased while maintaining a flat frequency response by using a third-order interleaving active feedback. The post-simulation results indicates that it can work at the bit-rate of 10Gb/s, a(More)
Compared with conventional electrical interconnection technology, optical interconnection has the merits of anti-interference, small signal loss, long transmission distance and so on. Furthermore, parallel optical interconnects become the crucial technique to solve the problem of large capacity data transmission in high-speed transmission systems. The(More)
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