Learn More
Time randomization method is an effective way to counteract Differential Power Analysis attack. By moving the cryptographic operations randomly in the time domain, this method could provide temporal shift to the power curves. This paper proposed an architecture for time randomization of AES. By randomly inserting registers among cryptographic modules, the(More)
To realize the high-speed performance of the processor, we need to research an efficient and flexible interconnection structure. In this paper, we propose a multistage interconnect structure based on Crossbar in the Coarse-Grained Reconfigurable Logic Array (CGRLA). Inner internet implements the connection of Functional operation unit flexibly and the outer(More)
As an important implementation of Cryptographic algorithm, processor should be thought about the ability of resistant power attack. In this paper we show a processor architecture, which automatically detects the execution of the encryption algorithms, and interleaves the execution of cryptographic algorithm code with that of dummy instructions to reduce the(More)
With the significant attention to information security, mobile terminals such as smartphone always be demand for integrating cryptographic processor. In this paper, a high-efficiency reconfigurable cryptographic processor is presented. Integrating small amounts of computing units designed by reconfigurable technology and developing instruction level(More)
  • 1