Learn More
—Ultrathin nitride/oxide (1.5/0.7 nm) dual layer gate dielectrics have been formed using remote plasma enhanced CVD of nitride onto plasma-grown oxide interface layers. High accumulation capacitance (1.72 F/cm 2) is measured and the equivalent oxide thickness is 1.6 nm after quantum effect corrections. Compared to 1.6 nm oxides, a tunneling current(More)
—Ultrathin nitride-oxide (N/O1.5/2.6 nm) dual layer gate dielectrics have been incorporated into PMOSFET's with boron-implanted polysilicon gates. Boron penetration is effectively suppressed by the top plasma-deposited nitride layer leading to improved short channel performance as compared to PMOSFET's with oxide dielectrics. In addition, improved interface(More)
—Ultrathin (1.9 nm) nitride/oxide (N/O) dual layer gate dielectrics have been prepared by the remote plasma enhanced chemical vapor deposition (RPECVD) of Si 3 N 4 onto oxides. Compared to PMOSFET's with heavily doped p +-poly-Si gates and oxide dielectrics, devices incorporating the RPECVD stacked nitrides display reduced tunneling current, effectively no(More)
  • 1