Yi-Chin Chu

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An experimental test chip was designed and manufactured to evaluate different test techniques. Based on the results presented in the wafer probe, 309 out of 5491 dies that passed the Stage 1 tests were packaged for further investigation. This paper describes the experimental setup and the preliminary results for the final package test. We focus on the(More)
A 25k gate Test Chip was designed and manufactured to evaluate different test methods for scan-designed circuits. The design of the chip, the experiment, and preliminary experimental results were presented at ITC'95. This paper presents results for different clock speeds and clocking modes (at-speed and delay), and uses this data to characterize the(More)
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