Yean-Kuen Fang

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In this work, influences of oxygen effect on an Hf-based high-k gate dielectric were investigated. A post deposition annealing (PDA) including oxygen ion after high-k dielectric deposition was used to improve reliability of the Hf-based high-k/metal gate device. The basic electrical characteristics of devices were compared with and without the PDA process.(More)
For nMOSFET, utilizing the high tensile stress gate capping layer (GC layer) and length of diffusion (LOD) to control the tensile and compressive stress in channel regions were developed. In this work, in order to investigate the interactive stress effects of GC layer film thickness, LOD and gate width on device's characteristic and hot-carrier reliability;(More)
—The impact of the Si cap/SiGe layer on the Hf-based high-k/metal gate SiGe channel pMOSFET performance and reliability has been investigated. We proposed an optimized strain SiGe channel with a Si cap layer to overcome the Ge diffusion and confine the channel carriers in the strained SiGe layer without the formation of a significant parasitic channel at(More)
The effect of post-thermal annealing (PA) after halo implantation on the reliability of sub-0.1 /spl mu/m CMOSFETs was investigated. We found that the control of annealing time is more efficient than that of annealing temperature with respect to improving the hot-carrier-induced device degradation. The best results of device performance were obtained with(More)
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