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We propose a CMOS-compatible top-down fabrication technique of highly-ordered and periodic SiO2 nanostructures using a single amorphous silicon (α-Si) mask layer. The α-Si mask pattern is precisely transferred into the underlying SiO2 substrate material with a high fidelity by a novel top-down fabrication. It is the first time for α-Si film used as an etch(More)
A novel nanofabrication technique which can produce highly controlled silicon-based nanostructures in wafer scale has been proposed using a simple amorphous silicon (α-Si) material as an etch mask. SiO2 nanostructures directly fabricated can serve as nanotemplates to transfer into the underlying substrates such as silicon, germanium, transistor gate, or(More)
Residual resist in the gate caused by wafer topography would prevent part of the fins from ion implantation. It is a big concern in semiconductor manufacturing. The optical interference intensity improvement of the region located between two gates induced by substituting the material of the sidewall of the gate with silicon oxide is discussed in this(More)
In this work, we have demonstrated a straightforward and CMOS-compatible nanofabrication technique that can produce well-ordered periodic SiO2 nanohole arrays in wafer-scale using a single amorphous silicon (α-Si) layer. It is the first time that α-Si material has been used as an etch mask to fabricate SiO2 nanostructures. Our results have shown that the(More)
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