—The MOS-HBT-NDR device is made of metal-oxide-semiconductor field-effect-transistor (MOS) and heterojunction bipolar transistor (HBT) devices, but it can show the negative-differential-resistance (NDR) current-voltage characteristic by suitably arranging the MOS parameters. We demonstrate a five-valued logic circuit using the two-peak MOS-HBT-NDR circuit… (More)
The evolutionary features based on the distributions of k-mers in the DNA sequences of various organisms are studied. The organisms are classified into three groups based on their evolutionary periods: (a) E. coli and T. pallidum (b) yeast, zebrafish, A. thaliana, and fruit fly, (c) mouse, chicken, and human. The distributions of 6-mers of these three… (More)
A split dimensional regularization, which was introduced for the Coulomb gauge by Leib-brandt and Williams, is used to regularize the spurious singularities of Yang-Mills theory in the temporal gauge. Typical one-loop split dimensionally regularized temporal gauge inte-grals, and hence the renormalization structure of the theory are shown to be the same as… (More)
—AND and NAND logic gate based on the negative differential resistance (NDR) device is demonstrated. This NDR device is made of metal-oxide-semiconductor field-effect-transistor (MOS) devices that could exhibit the NDR characteristic in the current-voltage curve by suitably arranging the MOS parameters. The devices and circuits are implemented by the… (More)
The behavior of two frequency divider circuits using negative differential resistance (NDR) circuit is studied. This NDR circuit is made of three resistors (R) and two bipolar-junction-transistor (BJT) devices. It can show the NDR characteristic in its current-voltage curve by suitably designing the resistances. We discuss a dynamic frequency divider, which… (More)
First, we create a MOS-NDR (negative differential resistance) cell and then put two MOS-NDR cells in cascode (totem-pole) structure. With MOBILE (monostable-bistable transition logic element) theorem we can built a MOS-NDR inverter by placing a NMOS in parallel with the lower part of the cascode structure.