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  • Y. Linn
  • 2005
In this paper we shall present a new non data aided (NDA) adaptive phase detection structure for carrier synchronization phase locked loops (PLLs) in M-ary phase shift keying (M-PSK) receivers. The structure's principal novelty is in the fact that it dynamically adapts the phase detector's S-curve to allow the PLL to perform optimally at virtually any input(More)
—A family of carrier lock detectors for M-PSK receivers operating in additive white Gaussian noise channels is suggested. The statistical properties of the lock detectors are derived theoretically using stochastic analysis, and computer simulations are used to validate the results obtained. The derivations yield discovery of two useful attributes of the(More)
  • Yair Linn
  • 2004
—A new method of estimating the signal-to-noise ratio for M-PSK receivers was presented previously, which derives that estimate from the locked-state value of a new family of carrier lock detectors. In this paper, a quantitative analysis is undertaken in which it is shown that this method requires significantly less hardware and/or software resources than(More)
Coherent demodulation in digital wireless communications involves generating a local carrier that is in phase with the received carrier, and then using this local carrier in order to coherently demodulate the received signal. Generation of the local carrier is done via a carrier synchronization Phase Lock Loop (PLL). The receiver also includes a symbol(More)
In most contemporary Phase Lock Loops (PLLs) used in high-datarate wireless receivers, some or all of the PLL's components are implemented digitally, in particular the PLL's loop filter. In this paper we develop the theory behind new efficient structures for the implementation of loop filters within FPGAs (Field Programmable Gate Arrays) using fixed-point(More)