• Publications
  • Influence
Challenges for Nanoscale MOSFETs and Emerging Nanoelectronics
  • Y. Kim
  • Materials Science
  • 25 June 2010
  • 176
  • 7
  • PDF
A novel low-power, low-offset, and high-speed CMOS dynamic latched comparator
TLDR
A novel dynamic latched comparator with offset voltage compensation is presented. Expand
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Integrated Circuit Design Based on Carbon Nanotube Field Effect Transistor
  • Y. Kim
  • Materials Science
  • 25 October 2011
As complementary metal-oxide semiconductor (CMOS) continues to scale down deeper into the nanoscale, various device non-idealities cause the I-V characteristics to be substantially different fromExpand
  • 38
  • 4
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High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
Gate-first integration of band-edge (BE) high-κ/metal gate nFET devices with dual stress liners and silicon-on-insulator substrates for the 45nm node and beyond is presented. We show the firstExpand
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A digital-trim controlled on-chip RC oscillator
TLDR
In this paper, a high-accuracy RC Oscillator circuit is demonstrated using trimming control. Expand
  • 8
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Paper : Challenges for Nanoscale MOSFETs and Emerging Nanoelectronics
Complementary metal-oxide-semiconductor (CMOS) technology scaling has been a main key for continuous progress in silicon-based semiconductor industry over the past three decades. However, as theExpand
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  • 2
  • PDF
A localized self-resetting gate design methodology for low power
  • W. Kim, Y. Kim
  • Physics
  • Proceedings of the 44th IEEE Midwest Symposium…
  • 14 August 2001
TLDR
In this paper, a modification of the traditional dynamic self-reset circuitry is introduced for low power SRAM circuit design. Expand
  • 11
  • 2
Leakage minimization technique for nanoscale
  • 7
  • 1
Standby Leakage Power Reduction Technique for
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generat- ing the adaptive optimalExpand
  • 7
  • 1
Implementation of a 1 volt supply voltage CMOS subbandgap reference circuit
TLDR
This paper presents a CMOS subbandgap reference circuit with a 1 V power supply voltage. Expand
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