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A novel lateral bipolar transistor with 67 GHz f/sub max/ on thin-film SOI for RF analog applications
In this paper, a novel lateral bipolar transistor on thin film silicon-on-insulator (SOI) is presented. With a small emitter size of 0.12/spl times/3.0 /spl mu/m/sup 2/, low base resistance of 270Expand
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High-frequency AC characteristics of 1.5 nm gate oxide MOSFETs
Results of the high-frequency AC characteristics of 1.5 nm direct-tunneling gate oxide MOSFET's were shown for the first time. Very high cutoff frequencies of more than 150 GHz were obtained at gateExpand
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Future perspective and scaling down roadmap for RF CMOS
The concept of future scaling-down for RF CMOS technology has been investigated in terms of f/sub T/, f/sub max/, RF noise, linearity, and matching characteristics, based on simulation andExpand
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High performance 35 nm gate length CMOS with NO oxynitride gate dielectric and ni SALICIDE
35 nm gate length CMOS devices with oxynitride gate dielectric and Ni SALICIDE have been fabricated to study the feasibility of achieving high performance with gate length scaling. The nitrogenExpand
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Study of the manufacturing feasibility of 1.5-nm direct-tunneling gate oxide MOSFETs: uniformity, reliability, and dopant penetration of the gate oxide
Although direct tunneling gate oxide MOSFETs are expected to be useful in high-performance applications of future large-scale integrated circuits (LSIs), there are many concerns related to theirExpand
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0.12 /spl mu/m raised gate/source/drain epitaxial channel NMOS technology
We introduce a 0.12 /spl mu/m nMOS technology with multi-Vth's for mixed high-speed digital and RF-analog applications. Though basically device parameter was determined by SIA roadmap, new structuresExpand
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A study of hot-carrier degradation in n- and p-MOSFETs with ultra-thin gate oxides in the direct-tunneling regime
Hot-carrier degradation in the direct-tunneling regime of the gate oxide was investigated under a wide range of conditions such as stress bias, oxide thickness, gate length, and channel-typeExpand
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High efficiency 2 GHz power Si-MOSFET design under low supply voltage down to 1 V
We have presented a design method of RF power Si-MOSFETs for low voltage and high power-added efficiency operation. It has been demonstrated that 0.2 /spl mu/m gate length Co-salicided Si MOSFETs canExpand
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0.18 /spl mu/m low voltage/low power RF CMOS with zero Vth analog MOSFETs made by undoped epitaxial channel technique
We introduce 0.18 /spl mu/m CMOS with multi-V/sub th/'s for mixed high-speed digital and RF-analog applications. The V/sub th/'s of MOSFETs for digital circuits are 0.4 V for NMOS and -0.4 V forExpand
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Undoped epitaxial Si channel n-MOSFET grown by UHV-CVD with preheating
Undoped epitaxial channel n-MOSFET with high transconductance was developed. In order to obtain a good crystal quality of the epitaxial layer and, thus, to achieve high performance, it is importantExpand
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