Xueyang Geng

Learn More
This paper presents a low power, ultra high speed and high resolution SiGe DDS MMIC with 24-bit phase and 10-bit amplitude resolution. The DDS MMIC has the capabilities of direct frequency and phase modulations with 24 bit and 12 bit resolution, respectively. It is the first reported mm-wave DDS with direct digital frequency and phase modulation(More)
This paper presents a 24-bit 5.0 GHz ultrahigh-speed direct digital synthesizer (DDS) with direct digital modulation capabilities used in a pulse compression radar. This design represents the first DDS RFIC in over-GHz output frequency range with direct digital modulation capabilities. It adopts a ROM-less architecture and has the capabilities for direct(More)
This paper describes a 12-bit 300 MHz CMOS DAC for high-speed system applications. The proposed DAC consists of a unit current-cell matrix for 8 MSBs and a binaryweighted array for 4 LSBs. In order to ensure the linearity of DAC, a double Centro symmetric current matrix is designed by using the Q random walk strategy. To minimize the feedthrough and improve(More)
This paper presents a low power, ultrahigh-speed and high resolution SiGe DDS MMIC with 11-bit phase and 10-bit amplitude resolutions. Using more than twenty thousand transistors, including an 11-bit pipeline accumulator, a 6-bit coarse sine-weighted DAC and eight 3-bit fine sine-weighted DACs, the core area of the DDS is 3 2.5 mm . The maximum clock(More)
This paper presents a low power, high speed SiGe DDS MMIC with 9-bit phase and 7-bit amplitude resolutions. This DDS MMIC is the first reported GHz range output DDS with direct digital frequency and phase modulation capabilities. Using more than eight thousand transistors, the DDS MMIC includes a 9-bit CLA accumulator for phase accumulation, a 9bit CLA(More)
This paper presents a low power, high speed and high resolution SiGe DDS MMIC with 11-bit phase and 10bit amplitude resolutions. Using more than twenty thousand transistors, including an 11-bit pipeline accumulator, a 6-bit coarse DAC and seven 3-bit fine DACs, the core area of the DDS is 3 × 2.5mm. The maximum clock frequency was measured at 8.6GHz with(More)
this paper presents an 8.7-13.8 GHz transformer-coupled varactor-less quadrature currentcontrolled oscillator (QCCO) RFIC. It incorporates a transformer-coupled technique and tuned by varying the operation current through the primary and secondary windings. Fabricated in a 0.13 μm SiGe BiCMOS process, the prototype QCCO achieves a 45.3% wide tuning range.(More)
This paper presents a transformer-coupled varactorless quadrature current-controlled oscillator (QCCO) RFIC covering the entire X-Band from 8.7 GHz to 13.8 GHz. The QCCO incorporates a transformer-coupled technique that achieves frequency tuning by varying the bias currents in the primary and secondary windings. Fabricated in a 0.18 m SiGe BiCMOS(More)
A single-chip X-band chirp radar transceiver with direct digital synthesis (DDS) for chirp generation is presented. The radar chip, including receiver, transmitter, quadrature DDS, phase-locked loop (PLL) and analog to digital converter (ADC), has been implemented in a 0.13μm BiCMOS technology. The stretch processing technique is employed to(More)
This paper presents an X-band chirp radar receiver with bandwidth reduction for range detection. The proposed receiver is composed primarily of a RF front end with reconfigurable bandwidth, a receiver baseband and an ADC. The receiver uses dual down-conversion architecture to convert the X-band chirp signal to the baseband signal, which is further mixed(More)