Xueyang Geng

Learn More
—This paper presents a transformer-coupled varactor-less quadrature current-controlled oscillator (QCCO) RFIC covering the entire X-Band from 8.7 GHz to 13.8 GHz. The QCCO incorporates a transformer-coupled technique that achieves frequency tuning by varying the bias currents in the primary and secondary windings. Fabricated in a 0.18 m SiGe BiCMOS(More)
— this paper presents an 8.7-13.8 GHz transformer-coupled varactor-less quadrature current-controlled oscillator (QCCO) RFIC. It incorporates a transformer-coupled technique and tuned by varying the operation current through the primary and secondary windings. Fabricated in a 0.13 µm SiGe BiCMOS process, the prototype QCCO achieves a 45.3% wide tuning(More)
—This paper describes a 12-bit 300 MHz CMOS DAC for high-speed system applications. The proposed DAC consists of a unit current-cell matrix for 8 MSBs and a binary-weighted array for 4 LSBs. In order to ensure the linearity of DAC, a double Centro symmetric current matrix is designed by using the Q 2 random walk strategy. To minimize the feedthrough and(More)
direct digital synthesis (DDS) for chirp generation is presented. The radar chip, including receiver, transmitter, quadrature DDS, phase-locked loop (PLL) and analog to digital converter (ADC), has been implemented in a 0.13μm BiCMOS technology. The stretch processing technique is employed to translate the time interval between the received and the(More)
—This paper presents a sixth order Butterworth switched capacitor (SC) low pass filter with radiation-hardened-by-design (RHBD) for cryogenic applications. Implemented in a 0.5μm SiGe BiCMOS technology, this cryogenic SC filter is capable of operating over an ultra-wide temperature (UWT) range from-180ºC to 120ºC and under high-energy particle radiation(More)
—This paper presents a low power, high speed and high resolution SiGe DDS MMIC with 11-bit phase and 10-bit amplitude resolutions. Using more than twenty thousand transistors, including an 11-bit pipeline accumulator, a 6-bit coarse DAC and seven 3-bit fine DACs, the core area of the DDS is 3 × 2.5mm 2. The maximum clock frequency was measured at 8.6GHz(More)