Xuecheng Zou

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This paper presents an alternative way to enhance power analysis attacks on AES hardware implementations for wireless sensor network (WSN) nodes. The proposed attack method adopts hamming differences of intermediate results as the power model and arranges plaintext inputs to maximize the differences of power traces. A simulation-based experimental(More)
Parallel computing is an important method used in high performance computing. A new SIMD architecture named ESCA (Engineering and Science Computing Accelerator) is introduced briefly in this paper. It aims to accelerate the computation for most critical scientific workload as a coprocessor by virtue of outstanding architecture and flexible parallel(More)
With mobile and wireless devices becoming pervasive, low-cost hardwares of security functions are being desired. A compact hardware implementation of the SM3 hash algorithm is presented in this paper. A SRAM is used to do message expansion function instead of shift registers which are used in common hardware implementations, and the values of A~H and V0~V7(More)
As the networking technology greatly advanced in past decades, Wireless Sensor Networks (WSN) have been widely deployed and utilized in various areas. Security issues on WSN devices thus draw much attention. In order to ensure the security of IEEE802.15.4 WSN and to fulfill the strict limitations of area and energy, we propose an efficient scheme for(More)
For a sensorless predictive-peak-current-controlled boost converter, the output voltage steady-state error cannot be eliminated by voltage loop PI controller. The basic cause for this is investigated through analysis and theoretical approaches. To eliminate the voltage steady-state error and achieve high-accuracy current estimation, a comprehensive(More)
The fast Fourier transform (FFT) is a fundamental kernel of many computation-intensive scientific applications. This paper deals with an implementation of the FFT on the accelerator system, a heterogeneous multicore architecture to accelerate computation-intensive parallel computing in scientific and engineering applications. The Engineering and Scientific(More)
IN this paper we present a parallel algorithm for FIR (Finite Impulse Response) filter computation based on Engineering and Scientific Computation Accelerator (ESCA) System. ESCA is a heterogeneous multi-core architecture aiming to accelerate the compute-intensive parallel computing in high performance applications. By taking advantage of SIMD processing(More)
Ion implantation, followed by annealing process, often leads to nonuniform doping and considerable depletion effect in the polysilicon gate of submicron MOS devices. Such an effect can alter notably the subthreshold characteristics and invalidate the conventional subthreshold current model. This paper studies the polysilicon-gate depletion effects on the(More)