On-chip decoupling capacitors are generally used to reduce power supply noise. Traditional decoupling capacitor designs using NMOS devices may no longer be suitable for 90nm CMOS technology due to increased concerns on thin-oxide gate leakage and electrostatic discharge (ESD) reliability. A cross coupled design for standard cells has recently been proposed… (More)
—On-chip decoupling capacitors (decaps) in the form of MOS transistors are widely used to reduce power supply noise. This paper provides guidelines for standard cell layouts of decaps for use within Intellectual Property (IP) blocks in application specific integrated circuit (ASIC) designs. At 90-nm CMOS technology and below, a tradeoff exists between… (More)
—On-chip decoupling capacitors (decaps) are generally used to reduce power supply noise. Passive decap designs are reaching their limits in 90nm CMOS technology due to higher operating frequency, lower supply voltage, increased concerns on electrostatic discharge (ESD) reliability and thin-oxide gate leakage. In this paper, a novel active decap design is… (More)
We propose a novel circuit called charge-borrowing decap (CBD) as a drop-in replacement for passive decaps to reduce supply noise for removal of " hot-spot " IR-drop problems found late in the design process. Measurement results on a 90nm test chip show that a noise reduction improvement between 42%-55% at 100MHz-1.5GHz over its passive counterpart.
Active decoupling capacitors (decaps) are more effective than passive decaps at reducing local IR-drop problems in the power distribution network. In the basic active decap, two parallel decaps are stacked in series whenever the voltage drop exceeds a given budget to boost the local supply voltage. However, the effectiveness of stacking three or more decaps… (More)